WHITE PAPERS, Technical Papers & Videos
Akrometrix Videos
- Visit the Akrometrix YouTube Channel for Videos on Thermal Warpage, Applications, Software and System Maintenance
Akrometrix Technical Papers
- Predictive Reliability Modeling of Hybrid Bonding Through Warpage and Interfacial Defect Correlation
- As originally published in IEEE ECTC 2026 Proceedings | Liton Kumar Biswas, Himanandhan R Kottur, Pavanbabu Arjunamahanthi, Neil Hubble, Paul Handler, Victor Vilar, Dadi Setiadi, Charles Woychik, Navid Asadizanjani
- Automatic Stencil Design Aperture Openings for BGAs to Mitigate Reflow Defects Caused by Chip Warpage using Numerical Shadow Moiré Data
- As originally published in SMTA Pan Pacific Symposium 2024 | Joseph Lee, Iman Dabous, Talbert Aguilar, Neil Hubble
- Alternative Methods in Measuring BGAs for Thermal Warpage
- As originally published in IPC APEX 2025 Proceedings (Best of Conference Winner) | Chris Gastaldo, Neil Hubble
- Innerlayer Copper Balancing to Reduce PCB Surface Topography Under Large Form Factor BGAs
- As originally published in IPC APEX 2024 Proceedings (Best of Conference Winner) | Gary Brist, Neil Hubble
- Selectively Assembling High-Value Components Based on Warpage in Order to Improve Reliability
- As originally published in IPC APEX 2023 Proceedings | Neil Hubble, Chance Rabun
- High Temperature Component Warpage as a Function of Moisture Sensitivity (MSL) Rating
- As originally published in SMTAI 2019 Proceedings | Neil Hubble
- Thermal Shadow Moiré to Cross-Section Correlation Study
- As originally published in SMTAI 2018 Proceedings | Jorge Arellano, Edgardo Alvarez, Steven Perng, Neil Hubble
- Effects of Package Warpage and Composite CTE on Failure Modes in Board-Level Thermal Cycling
- As originally published in SMTAI 2018 Proceedings | Andrew Mawer, Paul Galles, Mollie Benson, Burt Carpenter, Neil Hubble
- Effects of Temperature Uniformity on Package Warpage
- As originally published in IPC APEX 2018 Proceedings | Neil Hubble, Charly Olson
- Comparing Shadow Moiré and Digital Fringe Projection Warpage Metrology Techniques
- As originally published in SMTAI 2017 Proceedings | Neil Hubble, Leon Weaver
- Variables Affecting Bare PCB Warpage During Reflow
- As originally published in PCB West 2017 Proceedings | Neil Hubble, Avery Yeary
- Measuring Die Tilt Using Shadow Moiré Optical Measurements – Phase 2 (*Die Tilt – Phase 2)
- As originally published in EPTC 2016 Proceedings | Neil Hubble
- Measuring Die Tilt Using Shadow Moiré Optical Measurements (*Die Tilt Phase 1)
- As originally published in iMAPS International 2016 Proceedings | Neil Hubble
- Understanding PCB Design Variables
- As originally published in PCB West 2016 Proceedings | Donald Adams, Todd MacFadden, Rafael Maradiaga, Ryan Curry
- Surface Mount Signed Warpage Case Study (*Signed Warpage Phase 2)
- As originally published in IPC APEX 2017 Proceedings | Neil Hubble, Kim Hartnett, and Jerry Young
- Improvements in Decision Making Criteria for Thermal Warpage (*Signed Warpage Phase 1)
- As originally published in iMAPS Device Packaging 2016 Proceedings | Neil Hubble
- Implementing Warpage Management – A Five-Step Process for EMS Providers
- As originally published in US Tech, August 2014 | Ken Chiavone
- Ready to Start Measuring PCB Reflow Warpage
- Ken Chiavone, John Davignon
- Advanced Second Level Assembly Analysis Techniques – Troubleshooting Head-In-Pillow, Opens, and Shorts with Dual Full-Field 3D Surface Warpage Data Sets
- As originally published in IPC APEX EXPO 2013 Proceedings | Ken Chiavone
- PCB Dynamic Coplanarity at Elevated Temperatures
- iNEMI SMT Coplanarity Workgroup | John Davignon, Ken Chiavone, Jiahui Pan, James Henzi, David Mendez, Ron Kulterman
- Comparing Techniques for Temperature-Dependent Warpage Measurement
- Jiahui Pan, Ryan Curry, Neil Hubble, Dirk Zwemer
- Thinking Globally, Measuring Locally
- Patrick Hassell
- Advanced Warpage Characterization: Location and Type of Displacement can be Equally Important as Magnitude
- Patrick Hassell
- Measurement of Thermally Induced Warpage of BGA Packages/Substrates Using Phase-Stepping Shadow Moiré
- Yinyan Wang, Patrick Hassell
- Measuring board and component flatness
- Patrick B. Hassell, Thomas E. Adams
- Warpage Studies of HDI Test Vehicles
- Gregory J. Petriccione, I. Charles Ume, Ph.D.
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Akrometrix Documents and Best Practices
- Akrometrix Applications – Package on Package (PoP)
- Akrometrix Testing Applications
- Socket Testing Protocol Summary
- PCB Testing Protocol/Best Practices
- Die and Package Testing Protocol/Best Practices
- Introduction to High Volume Testing with Part Tracking™ in Akrometrix Studio 6.0
- Why Upgrade to Akrometrix Studio?
- Convective Reflow Emulation Module Testing Protocol
External Technical Papers
- Industry Trends (US Tech Version)
- FEA Simulation and In-situ Warpage Monitoring of Laminated Package Molded with Green EMC Using Shadow Moire System
- Zhao Baozong, Vivek Pai, Chinnu Brahateeswaran, Hu Guojun, Spencer Chew, Neephing Chin
- Elevated Temperature Measurements of Warpage of BGA Packages
- David W. Garrett
- Effect of PWB Warpage on BGAs Over Temperature
- Kyra Ewer, Jeffrey Seekatz
- Effect of Geometry and Temperature Cycle on the Reliability of WLCSP Solder Joints
- Satish C. Chaparala, Brian D. Roggeman, James M. Pitarresi, Bahgat G. Sammakia, John Jackson, Garry Griffin, Tom McHugh
- Measurement of Deformation and Strain in Flip Chip on BGA (FC-BGA)
- L. Kehoe, V. Guenebaut, P.V. Kelly
- CSP Board Level Reliability – Results
- H.J. Albrecht, G. Petzold, B. Schwarz, H. Teichmann
- Controlling Bow and Twist
- Bob Willis
- Generalizations about Component Flatness at Elevated Temperature
- As originally published in Toronto International Conference on Soldering and Reliability 2013
Bev Christian, Linda Galvis, Rick Shelley and Matthew Anthon
- As originally published in Toronto International Conference on Soldering and Reliability 2013
- Survey of Circuit Board Warpage During Reflow
- Michael J. Varnau
- Double Reflow-Induced Brittle Interfacial Failures in Pb-free Ball Grid Array Solder Joints
- As originally published in IPC APEX EXPO 2013 Proceedings
Julie Silk, George Wenger, Richard Coyle, Jon Goodbread, Andrew Giamis
- As originally published in IPC APEX EXPO 2013 Proceedings
- A Study on Package Stacking Process for Package-on-Package (PoP)
- Akito Yoshida, Jun Taniguchi, Katsumasa Murata, Morihiro Kada, Yusuke Yamamoto, Yoshinori Takagi, Takeru Notomi, Asako Fujit
- Paul Wang – PCB flatness pkg warpage 4panpacific 121103 Reviewed Final 4Presentation
- Paper Topography – TAPPI
- New Package/Board Materials Technology for Next-Generation Convergent Microsystems
- Nitesh Kumbhat, P. Markondeya Raj, Shubhra Bansal, Ravi Doraiswami, S. Bhattacharya and Rao Tummala
- The Lead-Free “Whac-A-Mole”
- Ron Leckie, President, INFRASTRUCTURE Advisors
- Traceability on the Line
- Compiled by SMT
- Shadow Moire Enters Production
- Kathleen McCray
- Correlation of Solder Joint Reliability of µPGA Socket To Package Flatness and PCB Warpage
- Dr. Paul P.E. Wang, Shlomo Novotny, Keith Graveling, Damian Hujic, Dr. Dereje Agonafer and Wonkee Ahn
- Quantitative Classification of Saw Marks of Silicon Wafers
- A. Lawerenz, S. Dauwe, F.W. Schulze